Computer systems' complexity has increased over time, leading to many challenges when developing fault-tolerant architectures. Although many existing mechanisms allow detection and recovery from system errors, the integration of monitors for system supervision and anomaly detection opens the opportunity to address dependability requirements that would otherwise not be met.
Besides, the envisioned trend of fog computing makes this challenge even harder due to complexity and heterogeneity of software and hardware deployed. Indeed, running several applications with different levels of criticality on edge platforms, embedding monitoring for system supervision, may negatively impact key requirements that applications within this environment must meet, such as computational power and storage need, power consumption, and real-time guarantees. However, allocating several mixed-criticality applications on the same hardware platform can address problems usually found in distributed systems, such as system synchronization and message ordering. In order to both exploit the outlined opportunities and address the presented challenges, we propose virtualization to integrate, manage, and re-use heterogeneous and isolated software components with different levels of criticality on a shared hardware platform.
We believe the characterization of architectural and timing dimensions of the monitoring solution can guide and drive the deployment of a predictable environment providing real-time guarantees to running applications. We will characterize the virtualized environment and the monitoring architecture considering: 1) whether the monitor is integrated within the hypervisor coordinating the virtualized environment, or else, running in an isolated virtual machine; 2) the data and anomalies targeted by the monitor; and 3) embedded platforms and their hardware support to virtualization, scoping the discussion about Multi-Processor System-on-Chips. These dimensions will all be evaluated through appropriate metrics addressing interferences due to CPU, cache, RAM and memory bus contention, and monitor-specific latency introduced, considering the trade-off between time requirements for accurate detection and system predictability.